1. Field of the Invention
The present invention relates to natural language assertions and in particular to providing a process/processor that can automatically analyze natural language assertions and convert them into verification language assertions and then generate interpreted natural language assertions from those verification language assertions, thereby allowing meaningful user review during verification.
2. Description of Related Art
Designs of integrated circuits (ICs) are increasingly becoming more complex, which in turn increases the desirability of faster verification of such designs. Unfortunately, the breakthroughs in design complexity frequently outpace verification process improvements. This disparity can be explained in part by the different languages used. Specifically, hardware description languages (HDLs) for IC design, such as Verilog or VHDL, use standard, text-based expressions of the spatial and temporal structure and behavior of electronic systems. Therefore, HDLs are well understood and accepted by designers. In contrast, verification languages, such as System Verilog, VERA, or E!, have a much higher level of formalism than HDLs, thereby resulting in much lower user acceptance.
Certain expressions used in software programming, called assertions, can contribute to the formalism of verification languages. An assertion is an expression that, if false, indicates an error. In the context of an HDL design, an assertion can check for specific behavior and display a message if that specific behavior occurs. Assertions can monitor both “good” and “bad” behavior. Unlike the standard, text-based expressions of HDLs, assertions tend to be designer-specific. That is, a user cannot easily read assertions written by others. Therefore, a user who is not the author of the assertions may well ignore assertions having a “Fail” status in verification.
Assertions can advantageously increase the controllability and the observability of a design during verification. Therefore, a need arises for a process of facilitating more use of assertions while increasing their readability.